Keywords = Drain Current
Design and Performance Analysis of Charge Plasma Tunnel Field Effect Transistor (CP-TFET) for Digital, Analog, and RF Applications

Articles in Press, Accepted Manuscript, Available Online from 16 March 2024

Girija Sravani K; Kireeti T; Rohith K; K. Srinivasa Rao


Design and Simulation of Silicon Germanium Based Double Gate Tunnel FET

Articles in Press, Accepted Manuscript, Available Online from 31 March 2024

Girija Sravani K; Rohith Sai K; Kireeti T; K. Srinivasa Rao


Design and Performance Analysis of High-k Gate All Around Fin-field Effect Transistor

Volume 37, Issue 3, March 2024, Pages 476-483

K. Rohith Sai; K. Girija Sravani; K. Srinivasa Rao; B. Balaji; V. Agarwal

Design and Performance Analysis of High-k Gate All Around Fin-field Effect Transistor


Design and Analysis of Hetero Dielectric Dual Material Gate Underlap Spacer Tunnel Field Effect Transistor

Volume 36, Issue 12, December 2023, Pages 2137-2144

S. Howldar; B. Balaji; K. Srinivasa Rao


Design and Performance Analysis of 6H-SiC Metal-Semiconductor Field-Effect Transistor with Undoped and Recessed Area under Gate in 10nm Technology

Volume 36, Issue 12, December 2023, Pages 2264-2271

A. Krishnamurthy; D. Venkatarami Reddy; E. Radhamma; B. Jyothirmayee; D. Sreenivasa Rao; V. Agarwal; B. Balaji


Design and Qualitative Analysis of Hetero Dielectric Tunnel Field Effect Transistor Device

Volume 36, Issue 6, June 2023, Pages 1129-1135

S. Howldar; B. Balaji; K. Srinivasa Rao