Novel Phase-frequency Detector based on Quantum-dot Cellular Automata Nanotechnology

Document Type : Original Article


1 Faculty of Engineering and Technology, University of Mazandaran, Babolsar, Iran

2 Department of Electrical and Computer Engineering, Mazandaran Institute of Technology, Babol, Iran


The electronic industry has grown vastly in recent years, and researchers are trying to minimize circuits delay, occupied area and power consumption as much as possible. In this regard, many technologies have been introduced. Quantum Cellular Automata (QCA) is one of the schemes to design nano-scale digital electronic circuits. This technology has high speed and low power consumption, and occupies very little area. Phase-locked loops (PLLs) and delay-locked loops (DLLs) are blocks that are commonly used in telecommunication applications. One of the most important parts in DLL and PLL is the phase-frequency detector. Therefore, the design of this circuit in QCA technology is of great importance. In this paper, two new phase-frequency detectors sensitive to falling and rising edge have been introduced in QCA technology. Both of the designs are composed of 104 cells; occupy only 0.13 μm2 of an area and 1.5 QCA clock cycles latency. The designs are in one layer and all the inputs and outputs are available to be used by another circuit.


1. Gholami, M. and Zoka, S., "Two novel d-flip flops with level
triggered reset in quantum dot cellular automata technology",
International Journal of Engineering, Transactions C: Aspects,
Vol. 31, No. 3, (2018), 415-421. 
2. Almatrood, A.F. and Singh, H., "Design of generalized pipeline
cellular array in quantum-dot cellular automata", IEEE
Computer Architecture Letters,  Vol. 17, No. 1, (2017), 29-32. 
3. Binaei, R. and Gholami, M., "Design of multiplexer-based d flipflop
with setand reset ability in quantum dot cellular automate nanotechnology", International Journal of Theoretical Physics, 
Vol. 58, No. 3, (2019), 687-699. 
4. Gholami, M., "Phase frequency detector using transmission gates
for high speed applications", International Journal of
Engineering, Transactions A: Basics, Vol. 29, No. 7, (2016),
5. Ding, Z., Liu, H. and Li, Q., "Phase-error cancellation technique
for fast-lock phase-locked loop", IET Circuits, Devices &
Systems,  Vol. 10, No. 5, (2016), 417-422. 
6. Estebsari, M., Gholami, M. and Ghahramanpour, M.J., "A wide
frequency range delay line for fast-locking and low power delaylocked-loops",
Analog Integrated Circuits and Signal
Processing,  Vol. 90, No. 2, (2017), 427-434. 
7. Gholami, M., "Phase detector with minimal blind zone and reset
time for gsamples/s dlls", Circuits, Systems, and Signal
Processing,  Vol. 36, No. 9, (2017), 3549-3563. 
8. Gholami, M., "Total jitter of delay-locked loops due to four main
jitter sources", IEEE Transactions on Very Large Scale
Integration (VLSI) Systems,  Vol. 24, No. 6, (2015), 2040-2049. 
9. Batchu, S., Talari, J.P. and Nirlakalla, R., "Analysis of low power
and high speed phase frequency detectors for phase locked loop
design", Procedia Computer Science,  Vol. 57, (2015), 10811087.
10. Liu, W., Swartzlander Jr, E.E. and O’Neill, M., "Design of
semiconductor qca systems, Artech House,  (2013). 
11. Srivastava, S., "Probabilistic modeling of quantum-dot cellular
automata",  University of South Florida, 2008. 
12. Compano, R., Molenkamp, L. and Paul, D., "Roadmap for
nanoelectronics", European Commission IST programme, Future
and Emerging Technologies,  (2000). 
13. Walus, K., Dysart, T.J., Jullien, G.A. and Budiman, R.A.,
"Qcadesigner: A rapid design and simulation tool for quantumdot
cellular automata", IEEE Transactions on Nanotechnology, Vol.3,No.1,(2004),26-31.
14. Srivastava, S., Asthana, A., Bhanja, S. and Sarkar, S., "Qcapro-an
error-power estimation tool for qca circuit design", in 2011 IEEE
international symposium of circuits and systems (ISCAS), (2011),