Study and Analysis of A Simple Self Cascode Regulated Cascode Amplifier

Document Type : Original Article

Authors

Department of Electronics and Communication Engineering, Motilal Nehru National Institute of Technology Allahabad, India

Abstract

This article proposed a simple self cascode RGC amplifier configuration to increase the gain and bandwidth. The cascode amplifier eliminates the miller capacitance between input and output and facilitates high gain, high input and output impedance with high bandwidth. However, the cascode amplifier requires relatively high supply voltage for proper operation and it decreases the output voltage swing by overdrive voltage. These issues are overcome by self cascode based RGC amplifier; even though it has low bandwidth due to the presence of one of its pole at low frequency. The bandwidth and output impedance of the conventional RGC has increased using a split length compensation technique. To improve the overall performance of the amplifier, introduced a simple self cascode RGC without using additional passive elements. The expression of gain and output impedance for the proposed amplifier is derived using small signal analysis. The calculated value of voltage gain for the projected circuit is 58.37 dB which is more than the self cascode based RGC. The power dissipation of the proposed circuit is 1.07 µWatt and it was compared with CS, cascode, self cascode and SC based cascode, RGC, SC based RGC amplifiers.

Keywords


1.     Zhao, X., Zhang, Q., Wang, Y. and Deng, M., “Transconductance and slew rate improvement technique for current recycling folded cascode amplifier”, AEU - International Journal of Electronics and Communications, Vol. 70, No. 3, (2016), 326–330.
2      Zhao, C., Liu, J., Shen, F. and Yi, Y., “Low power CMOS power amplifier design for RFID and the Internet of Things”, Computers & Electrical Engineering, Vol. 52, (2016), 157–170.
3.     Zhao, X., Fang, H., Ling, T. and Xu, J., “Low-voltage process-insensitive frequency compensation method for two-stage OTA with enhanced DC gain”, AEU - International Journal of Electronics and Communications, Vol. 69, No. 3, (2015), 685–690.
4.     Wang, J., Zhu, Z., Liu, S. and Ding, R., “A low-noise programmable gain amplifier with fully balanced differential difference amplifier and class-AB output stage”, Microelectronics Journal, Vol. 64, (2017), 86–91.
5.     Comer, D.J., Comer, D.T. and Petrie, C.S., “The utility of the composite cascode in analog CMOS design”, International Journal of Electronics, Vol. 91, No. 8, (2004), 491–502.
6.     Prodanov, V.I. and Green, M.M., “CMOS current mirrors with reduced input and output voltage requirements”, Electronics Letters, Vol. 32, No. 2, (1996), 104–105.
7.     Aghnout, S. and Masoumi, N., “Modeling of Substrate Noise Impact on a Single-Ended Cascode LNA in a Lightly Doped Substrate (RESEARCH NOTE)”, International Journal of Engineering - Transactions A: Basics, Vol. 23, No. 1, (2009), 23–28.
8.     Raj, N., Singh, A.K. and Gupta, A.K., “Low voltage high performance bulk driven quasi-floating gate based self-biased cascode current mirror”, Microelectronics Journal, Vol. 52, (2016), 124–133.
9.     Sedaghat, S.B., Karimi, G. and Banitalebi, R., “A Low Voltage Full-band Folded Cascoded UWB LNA with Feedback Topology”, International Journal of Engineering - Transactions A: Basics, Vol. 28, No. 1, (2014), 66–73.
10.   Kaur, J., Prakash, N. and Rajput, S.S., “A Low Voltage High Performance Self Cascode Current Mirror”, International Journal of Electronics and communication Engineering, Vol. 02, No. 5, (2008), 1017–1020.
11.   Galal, A.I.A., Pokharel, R., Kanaya, H. and Yoshida, K., “High linearity technique for ultra-wideband low noise amplifier in 0.18 μm CMOS technology”, AEU - International Journal of Electronics and Communications, Vol. 66, No. 1, (2012), 12–17.
12.   Chen, C. L., Hsieh, W. L., Lai, W. J., Chen, K. H. and Wang, C. S., “A high-speed and precise current sensing circuit with bulk control (CCB) technique”, 15th IEEE International Conference on Electronics, Circuits and Systems, IEEE, (2008), 283–287.
13.   Kundra, S., Soni, P. and Kundra, A., “Low power folded cascode OTA”, International Journal of VLSI design & Communication Systems, Vol. 3, No. 1, (2012), 127–136.
14.   Shekhar, S., Walling, J.S. and Allstot, D.J., “Bandwidth Extension Techniques for CMOS Amplifiers”, IEEE Journal of Solid-State Circuits, Vol. 41, No. 11, (2006), 2424–2439.