Design and Performance Analysis of 7-Level Diode Clamped Multilevel Inverter Using Modified Space Vector Pulse Width Modulation Techniques

Authors

1 Department Electrical and Electronics Engineering, CVR College of Engineering, Hyderabad, Telangana, India

2 Department of Electrical Engineering, University College of Engineering, Osmania University, Hyderabad, Telangana, India

3 Department Electrical and Electronics Engineering, College of Engineering, JNT University, Hyderabad, Telangana, India

Abstract

In this paper, a 7-level Diode Clamped Multilevel Inverter (DCMLI) is simulated with three different carrier PWM techniques. Here, Carrier based Sinusoidal Pulse Width Modulation (SPWM), Third Harmonic Injected Pulse Width Modulation (THIPWM) and Modified Carrier-Based Space Vector Pulse Width Modulation (SVPWM) are used as modulation strategies. These modulation strategies include Phase Disposition technique (PD), Phase Opposition Disposition technique (POD), and Alternate Phase Opposition Disposition technique (APOD). In all the modulation strategies, triangular carrier and trapezoidal triangular carrier signals are compared with reference signal, then control pulses are generated. The detailed analysis of the results has been presented and compared with experimental results in terms of fundamental component of output voltage and percent of THD.

Keywords


1.     Masaoud, A., Ping, H.W., Mekhilef, S. and Belkamel, H.O., "A new five-level single-phase inverter employing a space vector current control", Electric Power Components and Systems,  Vol. 42, No. 11, (2014), 1121-1130.

2.     Rodriguez, J., Lai, J.-S. and Peng, F.Z., "Multilevel inverters: A survey of topologies, controls, and applications", IEEE Transactions on Industrial Electronics,  Vol. 49, No. 4, (2002), 724-738.

3.     Belkamel, H., Mekhilef, S., Masaoud, A. and Naeim, M.A., "Novel three-phase asymmetrical cascaded multilevel voltage source inverter", IET Power Electronics,  Vol. 6, No. 8, (2013), 1696-1706.

4.     Mohamad, A.S., Mariun, N., Sulaiman, N. and Radzi, M.A.M., "A new cascaded multilevel inverter topology with minimum number of conducting switches", in Innovative Smart Grid Technologies-Asia (ISGT Asia), IEEE, (2014), 164-169.

5.     Ebrahimi, J., Babaei, E. and Gharehpetian, G.B., "A new multilevel converter topology with reduced number of power electronic components", IEEE Transactions on Industrial Electronics,  Vol. 59, No. 2, (2012), 655-667.

6.     Lai, J.-S. and Peng, F.Z., "Multilevel converters-a new breed of power converters", IEEE Transactions on Industry Applications,  Vol. 32, No. 3, (1996), 509-517.

7.     Gayathri, M.N. and Ganimozhi, T., "New hybrid cascaded multilevel inverter", International Journal of Engineering-Transactions B: Applications,  Vol. 26, No. 11, (2013), 1377-1385.

8.     Masaoud, A., Ping, H.W., Mekhilef, S. and Taallah, A., "Novel configuration for multilevel dc-link three-phase five-level inverter", IET Power Electronics,  Vol. 7, No. 12, (2014), 3052-3061.

9.     Rodriguez, J., Bernet, S., Steimer, P.K. and Lizama, I.E., "A survey on neutral-point-clamped inverters", IEEE Transactions on Industrial Electronics,  Vol. 57, No. 7, (2010), 2219-2230.

10.   Raj, P.H., Maswood, A.I., Ooi, G.H. and Lim, Z., "Voltage balancing technique in a space vector modulated 5-level multiple-pole multilevel diode clamped inverter", IET Power Electronics,  Vol. 8, No. 7, (2015), 1263-1272.

11.   Salam, Z., "A fast and efficient on-line harmonics elimination pulse width modulation for voltage source inverter using polynomials curve fittings", International Journal of Engineering Transaction B: Applications,  Vol. 23, No. 1, (2010), 53-68.

12.   Mekhilef, S. and Kadir, M.N.A., "Voltage control of three-stage hybrid multilevel inverter using vector transformation", IEEE Transactions on Power Electronics,  Vol. 25, No. 10, (2010), 2599-2606.

13.   Hasan, M., Mekhilef, S. and Ahmed, M., "Three-phase hybrid multilevel inverter with less power electronic components using space vector modulation", IET Power Electronics,  Vol. 7, No. 5, (2014), 1256-1265.

14.   Shukla, A., Ghosh, A. and Joshi, A., "Control of dc capacitor voltages in diode-clamped multilevel inverter using bidirectional buck–boost choppers", IET Power Electronics,  Vol. 5, No. 9, (2012), 1723-1732.

15.   Grigoletto, F.B. and Pinheiro, H., "Generalised pulse width modulation approach for dc capacitor voltage balancing in diode-clamped multilevel converters", IET Power Electronics,  Vol. 4, No. 1, (2011), 89-100.

16.   McGrath, B.P. and Holmes, D.G., "Multicarrier pwm strategies for multilevel inverters", IEEE Transactions on Industrial Electronics,  Vol. 49, No. 4, (2002), 858-867.

17.   Naderi, R. and Rahmati, A., "Phase-shifted carrier pwm technique for general cascaded inverters", IEEE Transactions on Power Electronics,  Vol. 23, No. 3, (2008), 1257-1269.

18.   Lee, D.-C. and Lee, G.-M., "A novel overmodulation technique for space-vector pwm inverters", IEEE Transactions on Power Electronics,  Vol. 13, No. 6, (1998), 1144-1151.

19.   Yao, W., Hu, H. and Lu, Z., "Comparisons of space-vector modulation and carrier-based modulation of multilevel inverter", IEEE Transactions on Power Electronics,  Vol. 23, No. 1, (2008), 45-51.

20.   Kang, D.-W., Lee, Y.-H., Suh, B.-S., Choi, C.-H. and Hyun, D.-S., "An improved carrier-based svpwm method using leg voltage redundancies in generalized cascaded multilevel inverter topology", IEEE Transactions on Power Electronics,  Vol. 18, No. 1, (2003), 180-187.

21.   Chintala, L.R., Peddapelli, S.K. and Malaji, S., "Improvement in performance of cascaded multilevel inverter using triangular and trapezoidal triangular multi carrier svpwm", Advances in Electrical and Electronic Engineering,  Vol. 14, No. 5, (2016), 562-570.