Electerical and Electronics Engineeing, Iran University of Science and Technology (IUST)
In this paper a novel common mode separation technique for implementing fully differential current buffers is introduced. Using the proposed method two high CMRR (Common Mode Rejection Ratio) and high PSRR (Power Supply Rejection Ratio) fully differential current buffers in BIPOLAR and CMOS technologies are implemented. Simulation results by HSPICE using 0.18μm TSMC process for CMOS based structures in 1.4V supply voltage and transistor models NUHFARRY and PUHFARRY for BJT based one in 1.6V supply voltage show CMRR of 32.9dB and 33.1dB for CMOS based and BJT based fully differential current buffers respectively. The proposed fully differential current buffers show PSRR- of 114dB and 116dB in CMOS and BIPOLAR technologies respectively while their PSRR+ are 100dB and 109dB respectively. The proposed common mode separation technique can also be arranged in partial positive feedback configuration to provide high current gain too. Simulation results of this configuration in CMOS technology, show current gain and CMRR of 20.86dB and 53.91dB respectively. The proposed method tends to be a fundamental technique in current mode signal processing capable to be much further improved and utilized.