Mixed-mode Multiphase Sinusoidal Oscillators using Differential Voltage Current Conveyor Transconductance Amplifiers and Only Grounded Passives Components

This article is about mixed-mode multiphase sinusoidal oscillators that are made up of differential voltage current conveyor transconductance amplifier (DVCCTA) and use all the grounded passive components. The proposed multiphase sinusoidal oscillators provide a single DVCCTA, a single grounded resistor and a capacitor for each phase which is suitable for integrated circuit implementation


INTRODUCTION 1
The multiphase sinusoidal oscillator (MSO) has come to be part of electrical and electronic engineering; which makes it an important component. MSO is widely used in many fields, such as communications, where it is used in phase modulators, quadrature mixers, and singlesideband generators [1,2], in power electronics systems for work related to a three-phase induction motor drive [3], and in measurement systems, where it is used for the selective voltmeters and vector generators [4]. From research and reviews of the literature, many researchers and publishers have suggested different ways to design the MSO, such as by using a low-pass filter, high-pass filter, and all-pass filter, which used active building 1blocks at high performance in development [5][6][7][8][9][10][11][12][13][14][15][16][17][18][19][20][21][22][23][24]. Table 1 Jantakun) phase of [7][8][9][10][11][13][14][15][16][17][18][19][20][21][22][23][24], which makes it easy to assemble for simulation and experimentation, the passive elements that have been used in minimal numbers in the literture [5-12, 14, 16, 19-24]. MSOs are all grounded, where a grounded capacitor is attractive for integrated circuit implementation. The design techniques of MSOs in literture [5,6,9,10,13,15,[17][18][19][20][21][22][23][24] do not require additional amplifier circuit for sinusoidal oscillation. The condition of oscillation (CO) can easily be adjusted electronically by a microcontroller or microcomputer [25,26]. In addition, some research has shown the results of experiments with commercially available integrated circuits (ICs) [5, 7-9, 15, 18]. However, in various MSOs, it was also found that there were various weaknesses as follow. Jaikla et al. [5], Thongdit et al. [6] and Tangsrirat et al. [12] reported that more than one active building block is used per phase. Skotis and Psychalinos [8], Wu et al. [9] Jaikla et al. [13], Klahan et al. [15], Pandey et  al. [17], Pandey and Bothra [18] reported a large number of resistors and capacitors are used, making the area of the integrated circuit (IC) larger. A floating capacitor has been used in literature [12-13, 17-18, 23], which are unsuitable for fabrication in an integrated circuit. The circuits reported in litertaure [7-8, 11-12, 14, 16] required additional amplifiers for sinusoidal oscillation. The stated conditions of oscillation in litertaure [8-9, 15, 17-18] cannot be adjusted electronically. The aim of this paper is to propose the use of three MSOs using a single differential voltage current conveyor transconductance amplifier (DVCCTA), a single resistor, and a single capacitor per phase, and to make use of all the grounded passive components. The current outputs have a high impedance and are directly connected to loads. The proposed circuits provide multiphase signals that are equally spaced in phase and of equal amplitude. It does not need additional amplifiers for oscillation as it can be adjusted electronically. In addition, the proposed MSOs show that the simulation results with the PSPICE program and experimental results with commercially available ICs agree well with the theoretical analysis.

PRINCIPLE OF OPERATION
This topic presents the electrical characteristics of the differential voltage current conveyor transconductance amplifier as an active building block. It was used as the basis for the design of the proposed MSOs. Next is analysis of the various working operations of MSOs, and last is a non-ideal case analysis of the proposed circuits.

1. Differential Voltage Current Conveyer Transconductance Amplifier
The differential voltage current conveyor transconductance amplifier (DVCCTA) was used in the synthesis of the proposed MSOs. The DVCCTA was published by Jantakun et al. [27]. It shows the details of the electrical symbols and equivalent circuits in Figure 1, which has various terminals as follow: terminals (Y1 and Y2) are input voltages, the voltage (VX) at the X terminal is the difference between the input voltages VY1 and VY2, the current (IZ) at the Z terminal is obtained by mirroring the current (IX) which is of equal amplitude, the output current (IO) at the O terminal is caused by multiplying the transconductance (gm) and the voltage (VZ). In addition, these terminals have high impedance except for the X terminal. The characteristics equation of DVCCTA can be written by the relative voltage and current as follows: The DVCCTA of the proposed circuit is implemented by BJT technology. The transconductance (gm) can be written as follows: From Equation (2), the transconductance (gm) can be adjusted electronically with the DC bias current (IB). The thermal voltage (VT) is equal to 26 mV at room temperature.

DVCCTA-based Gain-controllable Low-pass Filter
The gain-controllable lossy integrator, which is also known as the gain-controllable low-pass filter is shown here since the proposed MSOs are basedon these integrators. The DVCCTA-based gain controlled low-pass filters are shown in Figure 2. The current transfer function of Figures 2(a), 2(b), and 2(c) can be found in Table 2, which can be derived from the DVCCTA features. The current output can be constructed to work with non-inverting or inverting signals, as the current transfer function can act as either non-inverting or inverting gain-controllable low-pass filter.
It is clear that all three circuits of the gain-controllable low-pass filters have the same capability. This capability is that the circuit consists of one DVCCTA, one grounded resistor, and one grounded capacitor. Additionally, the circuit can be electronically tuned by adjusting the transconductance gain gm of the DVCCTA, making it appropriate for IC implementation [28][29][30]. Furthermore, it has high output impedances, allowing for simple cascading in current-mode configurations.

3. The Proposed Mixed-mode Multiphase Sinusoidal Oscillator
The proposed three mixedmode multiphase sinusoidal oscillators, which are oddphase MSO, in Figures 3(a), 3(b), and 3(c) are implemented. They are cascading the N identical stages (N  3, 5, 7….) of the DVCCTA-based inverting gaincontrollable low-pass filters for each phase. The sinusoidal signals are simultaneously generated for both the current and the voltage-mode. The sinusoidal current outputs are high impedance that can be cascaded directly to load or the next stage without any additional current amplifiers. However, the voltage outputs must be used with voltage buffers to make it connect to the next stage. Also, the even-phase MSO can be constructed by cascading non-inverting and inverting gain-controllable low-pass filters, as explained and reported in literature [31]. The transconductance and passive components in MSOs satisfy the equality conditions gm, C, and R. The parameters of MSOs can be then analyzed, and the results are summarized in Table 3. They provide the loop gain of the system, the characteristic equation, the CO and FO, and the phase relationship. When the CO and FO are set up, the steady-state magnitude ratios of the sinusoidal signals for voltages and currents show the same magnitude, as presented in Table 4. The output amplitude level of each gain-controllable low-pass filter may be easily stabilized using an optocoupler and photoresistor that is described in literature [32].
It is clearly seen that the three mixed-mode MSOs have the same ability, which is the CO can be tuned electronically/simultaneously of the FO by adjusting the DC bias current of DVCCTAs. Furthermore, when the CO and FO are archived, the ratio of output signals are close to unity. Consequently, the output signals are equally in amplitude and spaced in phase with respect to all oscillation frequencies.

4. Non-ideal Case Analysis of The Proposed Circuits
The non-ideal analysis of the proposed circuits is important to take the non-idealities of Figure 3. The proposed MSOs DVCCTA, which consist of the voltage and current tracking errors and the effects of the parasitic conponents, with details as follows:

4. 1. The Voltage and Current Tracking Errors
The voltage and current tracking errors of DVCCTA must be occurred by the mismatch of internal BJT which can be written with the characteristics equation as follows: where the voltage tracking errors from Y1 and Y2 terminals to the X terminal are the 1  and 2  .
The current tracking error from X terminal to Z terminal is the  , and the voltage tracking error from Z terminal for transfer to O terminal is the  . The ideally values of  ,  , and  parameters are equal to unity. However, the influence of the voltage and current tracking errors can be examined for the proposed MSOs, as stated in Table  5.

4. The Effects of Parasitic Conponents
The parasitic resistances and capacitances of DVCCTA are presented in Figure 4. The parasitic elements are connected to the ground at terminals Y1, Y2, Z, and O due to the presence of high impedances composed by parasitic resistances (RY1, RY2, RZ, and RO) and parasitic   Figure 4. Non-ideal DVCCTA model capacitances (CY1, CY2, CZ, and CO). Simultaneously, the X terminal has low impedance and has parasitic resistance (RX) connected in series. In Table 6, the effects of parasitic resistances and capacitances on the performance of the proposed MSOs are evaluated and explained in detail. It can be observed that both the CO and FO have been influenced by parasitic elements. It is clear that these parasitic elements have downgraded the performance of the proposed MSOs.

RESULTS OF SIMULATION AND EXPERIMENTAL
To prove the validity of the theoretical analysis, the proposed mixed-mode MSO circuit in Figure 3(c) was chosen as a simulation example. For example, N = 3 or three phase sinusoidal oscillators have been simulated through the PSPICE program. Figure 5 shows the internal construction of DVCCTA which is created by the PNP and NPN transistors using the parameters of the PR200N and NR200N bipolar transistors of the ALA400 transistor array from AT &T [32]. The setting of the condition of oscillation must have a value about of 2. In this arrangement, the resistors in the circuit have a standard value of R = 2 kΩ and DC bias current of IA = 50 µA and IB = 50 µA has been specified. The capacitor chooses a standard value of C = 1 nF and the power supply voltage  Figure 5. The internal construction of DVCCTA is set at ±1.5 V. The proposed MSO waveforms of IO1, IO2, and IO3 have been simulated and plotted with two states, including: the transient-state at 0 to 1000 µs of time simulation, as shown in Figure 6, and the steadystate, as shown in Figure 7. The frequency spectrums of the sinusoidal signals which have a frequency of 137 kHz are presented in Figure 8. When compared to the theoretically determined frequency of 137.83 kHz, the sinusoidal signals have a frequency error of 0.60 % which may have been caused by a voltage and current tracking error, as well as by the parasitic components described in the previous section. The total harmonic distortions (THD) of sinusoidal signals IO1, IO2, and IO3 have values of 0.793%, 0.726%, and 0.799%, respectively. The Lissajous patterns in Figure 9 show the phase relationships between output signals IO1 -IO2, IO2 -IO3, and IO3 -IO1.
In addition, the sinusoidal waveforms of voltage outputs are depicted in Figures 10 and 11, which are transient and steady state, respectively. Figure  The phase relation of VO1 -VO2, VO2 -VO3, and VO3 -VO1 are plotted in Figure 13. As demonstrated in Figure  14, the simulation results and theoretical calculation of the oscillation frequency can be plotted by adjusting the resistor values between 400 and 2k while keeping the ratio of resistor-to-DC bias constant. The simulation frequencies range between 137 kHz and 612 kHz, which are close to the theoretical calculation.  Figure 14. The oscillation frequency adjustment However, in practice, the tolerance errors of passive conponents affect the performance of proposed MSO circuits. These tolerance errors can be analyzed by using the Monte Carlo Analysis. The Gaussian probability distributions were set with 100 trials, which had a 1% tolerance error for each resistors and a 10% tolerance error for each capacitors. The simulation result can be plotted on the histogram of spread space FO as shown in Figure 15. The minimum and maximum of FO are 121.558 kHz and 157.007 kHz, respectively. The mean and median of FO are 136.054 kHz and 135.789 kHz, respectively.
To confirm the performance of the proposed MSO so that it conforms to the theory and the simulation, the circuit in Figure 3(c) is chosen as an experimental example for N = 3. The DVCCTA has been constructed using commercial ICs: AD830, AD844, and LM13700N as shown in Figure 16. The setting for the CO was set by a value of gmR greater than 2 which is set by configuring a value of R = 2 kΩ and bias currents are about IB = 50 µA. The capacitors are chosen with a value of C = 1 nF.
The input bias currents were tested with a Keysight 34461A and using a Siglent SPD3303C power supply was used to power the circuit by ±5 V. The Keysight DSOX3024T oscilloscope is used to display and measure sinusoidal waveforms parameters. The experimental is set up by the hardware used in Figure 17. The experimental results in Figure 18 are show the sinusoidal output waveforms of VO1, VO2, and VO3 which can generate a frequency of oscillation at 131.24 kHz. The calculated FO yields 137.83 kHz, while the FO of experimental had a 4.78% error frequency. The phase relationships between VO1 -VO2, VO2 -VO3, and VO3 -VO1 are 118.36°, 121.46°, and 120.24°, respectively, which is in accord with the theory proposed. The frequency spectrum of VO1, VO2, and VO3 are displayed in Figure 19 and the total harmonic distortions were measured at 0.56%, 0.44%, and 0.78%, respectively. In addition, the experimental results in Figures 19(a), 19(b) and 19(c) show the the magnitude of the first harmonic was higher

CONCLUSION
The three circuits of mixed-mode MSO using DVCCTA have been presented. They consist of a single DVCCTA, a single grounded resistor, and a single grounded capacitor for each phase. The proposed MSOs are both equally phased and of equal amplitude, which do not require additional amplifier for sinusoidal oscillation. Moreover, high impedance output currents are cascaded to the load without current buffers. Also, the oscillation can be adjusted simultaneously by the oscillation frequency using the electronic method. Finally, to confirm the validity of the proposed MSOs theory, it has been simulated with the PSPICE program and experimentally with commercially available ICs. The simulated and experimental results are completely consistent with the theory.

ACKNOWLEDGEMENT
This research was supported by a grant from the Faculty of Engineering, Rajamangala University of Technology, Isan, Khon Kaen Campus, Khon Kaen, Thailand.