Taguchi Approach and Response Surface Analysis for Design of a High-performance Single-walled Carbon Nanotube Bundle Interconnects in a Full Adder

Document Type: Original Article


1 Department of Electrical Engineering, Islamshahr Branch, Islamic Azad University, Islamshahr, Iran

2 Department of Mechanical and Instrumental Engineering, Academy of Engineering, Peoples’ Friendship University of Russia (RUDN University), 6 Miklukho-Maklaya Street, Moscow, 117198, Russian Federation


In this study, it was attempted to design a high-performance single-walled carbon nanotube (SWCNT) bundle interconnects in a full adder. For this purpose, the circuit performance was investigated using simulation in HSPICE software and considering the technology of 32-nm. Next, the effects of geometric parameters including the diameter of a nanotube, distance between nanotubes in a bundle, and width and length of the bundle were analyzed on the performance of SWCNT bundle interconnects in a full adder using Taguchi approach (TA). The results of Taguchi sensitivity analysis (TSA) showed that the bundle length is the most effective parameter on the circuit performance (about 51% on the power dissipation and 47% on the propagation delay). Moreover, the distance between nanotubes greatly affects the response compared to other parameters. Also, response surface method (RSM) indicated that an increase in the length of interconnects (L) improves the output of power dissipation. As the width of interconnects (W) and diameter of CNTs (D) increase the power dissipation also increases. Decrease in the distance between CNTs in a bundle (d) leads to an increase in power dissipation. The highest value of power dissipation is achieved if the maximum values for the parameters of length and width of interconnects (L, W), and diameter of CNTs (D) and the minimum value of the distance between CNTs in a bundle (d) are considered. It is also revealed that an increase in the length of interconnects (L) increases the propagation delay. Eventually, the optimum parameters are reported and the performance of the optimized system is compared using different methods (TA and RSM). Results indicate that the difference between the performance of optimal design of SWCNT bundle interconnects in a full adder predicted by different methods is less than 6% which is acceptable according to engineering standards.


1.     Steinhögl, W., Schindler, G., Steinlesberger, G., Traving, M. and Engelhardt, M., “Comprehensive study of the resistivity of copper wires with lateral dimensions of 100 nm and smaller”, Journal of Applied Physics, Vol. 97, No. 2, (2005), 023706. https://doi.org/10.1063/1.1834982
2.     Lu, Q., Zhu, Z., Yang, Y. and Ding, R., “Analysis of propagation delay and repeater insertion in single-walled carbon nanotube bundle interconnects”, Microelectronics Journal, Vol. 54, (2016), 85–92. https://doi.org/10.1016/j.mejo.2016.05.012
3.     Fathi, D. and Forouzandeh, B., “A novel approach for stability analysis in carbon nanotube interconnects”, IEEE Electron Device Letters, Vol. 30, No. 5, (2009), 475–477. https://doi.org/10.1109/LED.2009.2017388
4.     Zhang, K., Tian, B., Zhu, X., Wang, F. and Wei, J., “Crosstalk analysis of carbon nanotube bundle interconnects”, Nanoscale Research Letters, Vol. 7, No. 1, (2012), 1–5. https://doi.org/10.1186/1556-276X-7-138
5.     Shabalin, M. and Fuks, D., “Density functional theory study of the influence of segregation of S or Fe impurities on electromigration in nano-grained copper interconnects”, Journal of Applied Physics, Vol. 117, No. 19, (2015), 195303. https://doi.org/10.1063/1.4919922
6.     Deng, J., Patil, N., Ryu, K., Badmaev, A., Zhou, C., Mitra, S. and Wong, H. P., “Carbon nanotube transistor circuits: Circuit-level performance benchmarking and design options for living with imperfections”, In Digest of Technical Papers - IEEE International Solid-State Circuits Conference, USA, (2007). https://doi.org/10.1109/ISSCC.2007.373592
7.     Put, S., Simoen, E., Collaert, N., Claeys, C., Van Uffelen, M. and Leroux P., “Geometry and strain dependence of the proton radiation behavior of MuGFET devices”, IEEE Transactions on Nuclear Science, Vol. 54, No. 6, (2007), 2227–2232. https://doi.org/10.1109/TNS.2007.911420
8.     Porod, W., Lent, C., Bernstein, G. H., Orlov, A. O., Hamlani, I., Snider, G. L. and Merz, J. L., “Quantum-dot cellular automata: Computing with coupled quantum dots”, International Journal of Electronics, Vol. 86, No. 5, (1999), 549–590. https://doi.org/10.1080/002072199133265
9.     Deng, G. and Chen, C., “Hybrid CMOS-SET arithmetic circuit design using coulomb blockade oscillation characteristic”, Journal of Computational and Theoretical Nanoscience, Vol. 8, No. 8, (2011), 1520–1526. https://doi.org/10.1166/jctn.2011.1845
10.   Zhao, W. S., Wang, G., Hu, J., Sun, L. and Hong, H.,  “Performance and stability analysis of monolayer single-walled carbon nanotube interconnects”, International Journal of Numerical Modelling: Electronic Networks, Devices and Fields, Vol. 28, No. 4, (2015), 456–464. https://doi.org/10.1002/jnm.2027
11.   Chiodarelli, N., Kellens, K., Cott, D. J., Peys, N., Arstila, K., Heyns, M., De Gendt, S., Groeseneken, G. and Vereecken, P. M.,  “Integration of Vertical Carbon Nanotube Bundles for Interconnects”, Journal of The Electrochemical Society, Vol. 157, No. 10, (2010), 211-217. https://doi.org/10.1149/1.3473810
12.   Rai, M. K. and Sarkar, S., “Influence of tube diameter on carbon nanotube interconnect delay and power output”, Physica Status Solidi (A), Vol. 208, No. 3, (2011), 735–739. https://doi.org/10.1002/pssa.201026314
13.   Srivastava, N. and Banerjee, K., “Performance analysis of carbon nanotube interconnects for VLSI applications”, In IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD, USA, Vol. 2005, (2005), 383-390. https://doi.org/10.1109/ICCAD.2005.1560098
14.   Wei, C., Cho, K. and Srivastava, D., “Tensile strength of carbon nanotubes under realistic temperature and strain rate”, Physical Review B - Condensed Matter and Materials Physics, Vol. 67, No. 11, (2003), 115407. https://doi.org/10.1103/PhysRevB.67.115407
15.   Vanpaemel, J., Sugiura, M., Barbarin, Y., De Gendt, S., Tökei, Z., Vereecken, P. M. and van der Veen, M. H., “Growth and integration challenges for carbon nanotube interconnects”, Microelectronic Engineering, Vol. 120, (2014), 188–193. https://doi.org/10.1016/j.mee.2013.09.015
16.   McEuen, P. L., Fuhrer, M. S., and Park, H., “Single-walled carbon nanotube electronics”, IEEE Transactions on Nanotechnology, Vol. 1, No. 1, (2002), 78–84. https://doi.org/10.1109/TNANO.2002.1005429
17.   Massoud, Y. and Nieuwoudt, A., “Modeling and design challenges and solutions for carbon nanotube-based interconnect in future high performance integrated circuits”, ACM Journal on Emerging Technologies in Computing Systems, Vol. 2, No. 3, (2006), 155–196. https://doi.org/10.1145/1167943.1167944
18.   Bagheri, A., Ranjbar, M., Haji-Nasiri, S. and Mirzakuchaki, S., “Modelling and analysis of crosstalk induced noise effects in bundle SWCNT interconnects and its impact on signal stability”, Journal of Computational Electronics, Vol. 16, No. 3, (2017), 845–855. https://doi.org/10.1007/s10825-017-1028-1
19.   Xu, Z., Zhang, W., Zhu, Z., Ren, C., Li, Y. and Huai, P., “Effects of tube diameter and chirality on the stability of single-walled carbon nanotubes under ion irradiation”, Journal of Applied Physics, Vol. 106, No. 4, (2009), 043501. https://doi.org/10.1063/1.3194784
20.   Shin, Y. R., Jeon, I. Y., and Baek, J. B., “Stability of multi-walled carbon nanotubes in commonly used acidic media”, Carbon, Vol. 50, No. 4, (2012), 1465–1476. https://doi.org/10.1016/j.carbon.2011.11.017
21.   Moaiyeri, M. H., Mirzaee, R. F., Navi, K. and Momeni, A., “Design and analysis of a high-performance CNFET-based Full Adder”, International Journal of Electronics, Vol. 99, No. 1, (2012), 113–130. https://doi.org/10.1080/00207217.2011.623269
22.   Nejadzadeh, P. and Reshadinezhad, M. R., “Modern Education and Computer Science”, Modern Education and Computer Science, Vol. 4, No. 4, (2018), 43–50. https://doi.org/10.5815/ijmecs.2018.04.06
23.   Ghadiry, M.H., Abd Manaf, A., Ahmadi, M.T., Sadeghi, H. and Senejani, M.N., “Design and Analysis of a New Carbon Nanotube Full Adder Cell”, Journal of Nanomaterials, Vol. 2011, (2011), 1-6. https://doi.org/10.1155/2011/906237
24.   Ghanatghestani, M. M., Ghavami, B., and Salehpour, H., “A CNFET full adder cell design for high-speed arithmetic units”, Turkish Journal of Electrical Engineering & Computer Sciences, Vol. 25, No. 3, (2017), 2399–2409. https://doi.org/10.3906/elk-1512-8
25.   Ghorbani, A., Sarkhosh, M., Fayyazi, E., Mahmoudi, N. and Keshavarzian, P., “A Novel full adder cell based on carbon nanotube field effect transistors”, International Journal of VLSI design & Communication Systems, Vol. 3, No. 3, (2012), 33-42. https://doi.org/10.5121/vlsic.2012.3304
26.   Sharifi, F., Moaiyeri, M. H., Navi, K. and Bagherzadeh, N.,  “Quaternary full adder cells based on carbon nanotube FETs”, Journal of Computational Electronics, Vol. 14, No. 3, (2015), 762–772. https://doi.org/10.1007/s10825-015-0714-0
27.   Torkzadeh Mahani, A. and Keshavarzian, P., “A novel energy-efficient and high speed full adder using CNTFET”, Microelectronics Journal, Vol. 61, (2017), 79–88. https://doi.org/10.1016/j.mejo.2017.01.009
28.   Dolati, S., Fereidoon, A. and Reza Kashyzadeh, K., “A comparison study between Boron nitride nanotubes and carbon nanotubes”, International Journal of Emerging Technology and Advanced Engineering, Vol. 2, Issue. 10, (2012), 470-474. http://citeseerx.ist.psu.edu/viewdoc/download?doi=
29.   Srivastava, N., Li, H., Kreupl, F. and Banerjee, K., “On the applicability of single-walled carbon nanotubes as VLSI interconnects”, IEEE Transactions on Nanotechnology, Vol. 8, No. 4, (2009), 542–559. https://doi.org/10.1109/TNANO.2009.2013945
30.   Lamberti, P. and Tucci, V., “Impact of the variability of the process parameters on CNT-based nanointerconnects performances: A comparison between SWCNTs bundles and MWCNT”, IEEE Transactions on Nanotechnology, Vol. 11, No. 5, (2012), 924–933. https://doi.org/10.1109/TNANO.2012.2207124
31.   Das, P. K., Majumder, M. K., Kaushik, B. K. and Dasgupta, S., “Analysis of propagation delay in mixed carbon nanotube bundle as global VLSI interconnects”, Asia Pacific Conference on Postgraduate Research in Microelectronics and Electronics, (2012), 118–121. https://doi.org/10.1109/PrimeAsia.2012.6458638
32.   Subash, S. and Chowdhury, M. H., “Mixed carbon nanotube bundles for interconnect applications”, International Journal of Electronics, Vol. 96, No. 6, (2009), 657–671. https://doi.org/10.1080/00207210902791702
33.   Farrahi, G. H., Reza Kashyzadeh, K., Minaei, M., Sharifpour, A. and Riazi, S., “Analysis of resistance spot welding process parameters effect on the weld quality of three-steel sheets used in automotive industry: Experimental and finite element simulation”, International Journal of Engineering, Transactions A: Basics, Vol. 33, No. 1, (2020), 148–157. https://doi.org/10.5829/ije.2020.33.01a.17
34.   Maleki, E., Unal, O., and Reza Kashyzadeh, K., “Efficiency Analysis of Shot Peening Parameters on Variations of Hardness, Grain Size and Residual Stress via Taguchi Approach”, Metals and Materials International, Vol. 25, No. 6, (2019), 1436–1447. https://doi.org/10.1007/s12540-019-00290-7
35.   Li, K., Yan, S., Zhong, Y., Pan, W. and Zhao, G., “Multi-objective optimization of the fiber-reinforced composite injection molding process using Taguchi method, RSM, and NSGA-II”, Simulation Modelling Practice and Theory, Vol. 91, (2019), 69–82. https://doi.org/10.1016/j.simpat.2018.09.003